DWM3000 V1.4 module communication issue for more than 199bytes

Hi,
Now I am using DWM3000 V1.4 module for long frame(1000bytes) communication, I found the module can’t get correct data when the length of frame is more than 199 bytes, it is correct for below 200byts frame. Could you help me to check the issue? I need to use DWM3000 module for more 1000bytes communication, How to do to meet my needs? Thanks.
I tested the combination of DWM3000 and DWM1000. One DWM3000 module acts as a sender and another DWM3000 module acts as a receiver, the receiver can’t get correct data when the length of frame is more than 199 bytes; One DWM1000 module acts as a sender and another DWM1000 module acts as a receiver, the receiver can get correct data when the length of frame is 1000 bytes; One DWM1000 module acts as a sender and DWM3000 module acts as a receiver, the receiver can get correct data too when the length of frame is 1000 bytes; One DWM3000 module acts as a sender and another DWM1000 module acts as a receiver, the receiver can’t get correct data when the length of frame is more than 199 bytes.

Below is my configuration

dwt_config_t DWM3000sync_config = {
5, /* Channel number. /
DWT_PLEN_128, /
Preamble length. Used in TX only. /
DWT_PAC8, /
Preamble acquisition chunk size. Used in RX only. /
9, /
TX preamble code. Used in TX only. /
9, /
RX preamble code. Used in RX only. /
0, /
0 to use standard 8 symbol SFD, 1 to use non-standard 8 symbol, 2 for non-standard 16 symbol SFD and 3 for 4z 8 symbol SDF type /
DWT_BR_6M8, /
Data rate. /
DWT_PHRMODE_EXT, /
PHY header mode. /
DWT_PHRRATE_STD, /
PHY header rate. /
(129 + 8 - 8), /
SFD timeout (preamble length + 1 + SFD length - PAC size). Used in RX only. /
DWT_STS_MODE_OFF, /
STS disabled /
DWT_STS_LEN_64, /
STS length see allowed values in Enum dwt_sts_lengths_e /
DWT_PDOA_M0 /
PDOA mode off /
};
dwt_config_t DWM1000sync_config = {
5, /
Channel number. /
DWT_PRF_64M, /
Pulse repetition frequency. /
DWT_PLEN_128, /
Preamble length. Used in TX only. /
DWT_PAC8, /
Preamble acquisition chunk size. Used in RX only. /
9, /
TX preamble code. Used in TX only. /
9, /
RX preamble code. Used in RX only. /
0, /
0 to use standard SFD, 1 to use non-standard SFD. /
DWT_BR_6M8, /
Data rate. /
DWT_PHRMODE_EXT, /
PHY header mode. /
(129 + 8 - 8) /
SFD timeout (preamble length + 1 + SFD length - PAC size). Used in RX only. */
};

Best Regards,
FFU

Hi ffu,

Did you calibrate clock offsets? That could be the main reason you are getting different results with different boards.

Regards,
Emre

Hi Emre,
Thanks.
How to calibrate clock offsets? According to example of “ex_02f_rx_with_crystal_trim” to try?

Best Regards,
FFU

Hi Emre,
I tried to add calibration offsets in deca_device.c file.
if (status & SYS_STATUS_RXFCG_BIT_MASK)
{
uint16_t finfo16;

        // Read frame info - Only the first two bytes of the register are used here.
        switch (pdw3000local->dblbuffon)  //check if in double buffer mode and if so which buffer host is currently accessing
        {
        case DBL_BUFF_ACCESS_BUFFER_1: //accessing frame info relating to the second buffer (RX_BUFFER_1)
            dwt_write8bitoffsetreg(RDB_STATUS_ID, 0, RDB_STATUS_CLEAR_BUFF1_EVENTS);  //clear DB status register bits corresponding to RX_BUFFER_1
            finfo16 = dwt_read16bitoffsetreg(INDIRECT_POINTER_B_ID, 0);
            break;
        case DBL_BUFF_ACCESS_BUFFER_0: //accessing frame info relating to the first buffer (RX_BUFFER_0)
            dwt_write8bitoffsetreg(RDB_STATUS_ID, 0, RDB_STATUS_CLEAR_BUFF0_EVENTS);  //clear DB status register bits corresponding to RX_BUFFER_0
            finfo16 = dwt_read16bitoffsetreg(BUF0_RX_FINFO, 0);
            break;
        default: //accessing frame info relating to the second buffer (RX_BUFFER_0) (single buffer mode)
            finfo16 = dwt_read16bitoffsetreg(RX_FINFO_ID, 0);
            break;
        }

        // Report frame length - Standard frame length up to 127, extended frame length up to 1023 bytes
        if(pdw3000local->longFrames == 0)
        {
            pdw3000local->cbData.datalength = finfo16 & RX_FINFO_STD_RXFLEN_MASK;
        }
        else
        {
            pdw3000local->cbData.datalength = finfo16 & RX_FINFO_RXFLEN_BIT_MASK;
        }

        // Report ranging bit
        if(finfo16 & RX_FINFO_RNG_BIT_MASK)
        {
            pdw3000local->cbData.rx_flags |= DWT_CB_DATA_RX_FLAG_RNG;
        }
        
        Calibration_TimeOffset();                   //??????????

    }

Then the sender(DWM3000) send 1020 bytes, the receiver(DWM3000) can get correct frame length, and the front 199bytes, but more than 199bytes data are error, please see below picture

Any another way to try? Thanks.

Best Regards,
FFU

Hi FFU,

You can check clock offsets by using a Spectrum Analyzer in CW transmission mode. Please check APS312 3.3.1 Crystal Trim .

Are you using the same DW1000 and DW3000 boards in the second and third cases of your first message? If so, clock offset may not be the reason for your problem.

Regards,
Emre

Hi Emre,
Yes. I am using same boards, include one DWM1000 board and two DWM3000 boards. Now the issue seems to come from the sender(DWM3000), The receiver can’t get all correct data when the sender send more than 199 bytes per frame. I can’t find the long frame example in all examples. Could you help to provide long frame communication example to me for reference? Thanks.

Best Regards,
FFU

Hi Emre,
Another question, if I change the header rate parameter from DWT_PHRRATE_STD to DWT_PHRRATE_DTA, see below, the receiver will can’t get any data for two DWM3000 communication, I don’t know why.

dwt_config_t DWM3000sync_config = {
5, /* Channel number. /
DWT_PLEN_128, /
Preamble length. Used in TX only. /
DWT_PAC8, /
Preamble acquisition chunk size. Used in RX only. /
9, /
TX preamble code. Used in TX only. /
9, /
RX preamble code. Used in RX only. /
0, /
0 to use standard 8 symbol SFD, 1 to use non-standard 8 symbol, 2 for non-standard 16 symbol SFD and 3 for 4z 8 symbol SDF type /
DWT_BR_6M8, /
Data rate. /
DWT_PHRMODE_EXT, /
PHY header mode. /
DWT_PHRRATE_DTA, /
PHY header rate. /
(129 + 8 - 8), /
SFD timeout (preamble length + 1 + SFD length - PAC size). Used in RX only. /
DWT_STS_MODE_OFF, /
STS disabled /
DWT_STS_LEN_64, /
STS length see allowed values in Enum dwt_sts_lengths_e /
DWT_PDOA_M0 /
PDOA mode off /
};

Merry Christmas!

Best Regards,
FFU